標題: A 0.6V, 1.3GHZ DYNAMIC COMPARATOR WITH CROSS-COUPLED LATCHES
作者: Kuo, Bo-Jyun
Chen, Bo-Wei
Tsai, Chia-Ming
交大名義發表
National Chiao Tung University
公開日期: 2015
摘要: This paper presents a sub-1V dynamic comparator with cross-coupled latches at multi-GHz operation. The low-voltage cross-coupled latches structure with a separated tail current can be used to optimize the speed and the offset in the latched stage, respectively. A high speed readout circuit is also proposed to further enhance the speed of the comparator. With BER=10(-9), the comparator achieves 143fJ at 3.3GHz and a 0.9V supply, which decreases to only 49fJ at 1.3GHz and a 0.6V supply. Both measured results are based on the input differential voltage of only 4.2mV. The comparator is implemented in 65nm CMOS technology and the chip area of the core circuit occupies 265 mu m(2).
URI: http://hdl.handle.net/11536/136075
ISBN: 978-1-4799-6275-4
期刊: 2015 International symposium on VLSI Design, Automation and Test (VLSI-DAT)
Appears in Collections:Conferences Paper