完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Schlichtmann, Ulf | en_US |
dc.contributor.author | Hashimoto, Masanori | en_US |
dc.contributor.author | Jiang, Iris Hui-Ru | en_US |
dc.contributor.author | Li, Bing | en_US |
dc.date.accessioned | 2017-04-21T06:49:52Z | - |
dc.date.available | 2017-04-21T06:49:52Z | - |
dc.date.issued | 2016 | en_US |
dc.identifier.isbn | 978-1-4673-9569-4 | en_US |
dc.identifier.issn | 2153-6961 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/136178 | - |
dc.description.abstract | At nanometer manufacturing technology nodes, process variations affect circuit performance significantly. In addition, performance deterioration of circuits due to aging effects is also increasing. Consequently, a large timing margin is required to maintain yield. To combat the pessimism and the resulting overdesign, aging analysis with high-level models, on-chip timing margin monitoring and tuning, and flexible delay models of flip-flops can be deployed. This paper gives an overview of the state of the art of applying these techniques to improve the health of circuits. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Reliability, Adaptability and Flexibility in Timing: Buy a Life Insurance for Your Circuits | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2016 21ST ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) | en_US |
dc.citation.spage | 705 | en_US |
dc.citation.epage | 711 | en_US |
dc.contributor.department | 交大名義發表 | zh_TW |
dc.contributor.department | National Chiao Tung University | en_US |
dc.identifier.wosnumber | WOS:000384642200122 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |