標題: Fault Models for Embedded-DRAM Macros
作者: Chao, Mango C. -T.
Yang, Hao-Yu
Huang, Rei-Fu
Lin, Shih-Chin
Chin, Ching-Yu
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Memory testing;embedded DRAM
公開日期: 2009
摘要: In this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first start from an standard SRAM test algorithm and discuss the faults which are not covered in the SRAM testing but should be considered in the DRAM testing. Then we study the behavior of those faults and the tests which can detect them. Also, we discuss how likely each modeled fault may occur on eDRAMs and commodity DRAMs, respectively.
URI: http://hdl.handle.net/11536/13823
ISBN: 978-1-60558-497-3
ISSN: 0738-100X
期刊: DAC: 2009 46TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2
起始頁: 714
結束頁: 719
顯示於類別:會議論文