標題: 單分子層摻雜與微波退火形成超淺摻雜之研究
A Study on Ultra-Shallow Doping by Molecular Monolayer Doping Technology and Microwave Annealing
作者: 卓大鈞
趙天生
李耀仁
Cho, Ta-Chun
Chao, Tien-Shang
Lee, Yao-Jen
電子物理系所
關鍵字: 微波退火;單層摻雜;超淺摻雜;microwave annealing;monolayer doping;ultra-shallow doping
公開日期: 2016
摘要: 現今的互補式金氧半場效電晶體技術發展,對於短通道效應的控制將使得元件製程更趨複雜,為了解決嚴重漏電流與次臨界擺幅劣化等問題,源極/汲極區域的接面製作將會是一大重要課題,尤其是接面深度與接面電阻率。因為高溫退火會造成嚴重的摻雜物擴散,為了活化摻雜物並完成超淺、超陡峭摻雜濃度,低溫微波退火將會是一個理想的技術。 首先,我們將磷、砷、二氟化硼分別摻雜於矽基板,並使用微波退火或快速升溫退火完成摻雜物活化。在相同片電阻的情況下,微波退火的溫度將可比傳統快速升溫退火少80到140度,因此微波退火更有利於製作低阻值且未擴散的超淺接面。除了比較不同溫度下,兩種退火技術在片電阻的趨勢之外,在此也同時探討基板的溫度,因為基板溫度與微波能量的耦合,摻雜物即可在低溫的情況下完成活化。 另一方面,元件製作在三維結構上將遭遇技術上的困難,傳統的離子佈值受限於不均勻的縱向分佈,使得摻雜技術將會遭遇到挑戰。本論文中,我們發展出一種在矽材料表面進行化學分子反應的方式,利用其自我組裝的特性來達到均勻性佳、淺摻雜、無損傷的摻雜過程。由於自我侷限的反應特性將對摻雜原子分佈有更好的控制能力,因此本摻雜方式將能應用到下個世代。我們將介紹分子摻雜所形成的淺摻雜區對三閘極電晶體的影響及製程的簡化方式,並藉由微波退火機制形成淺摻雜區提升元件電特性。此外探討不同退火機制及退火次數對於源極/汲極區摻雜分佈及閘極氧化層造成的影響。 隨著元件尺寸的微縮,對於傳統金氧半場效電晶體來說,短通道效應與隨機摻雜不穩定性將是嚴重的問題。因為擁有簡單製程與較大等效閘極長度的優勢,無接面電晶體將會是一個合適的替代選擇,然而傳統離子佈植會有同一晶片摻雜不穩定的困難,對於同一晶片上的無接面電晶體來說將使得每一個電晶體的驅動電流不穩定,這也造成量子效應及較大的串聯電阻而劣化元件特性。此外為了有效地控制元件,摻雜通道區的體積必須要夠小才能達到良好的閘極控制,這將對驅動電流產生瓶頸,也限制無接面電晶體的發展可行性。為了解決上述問題,我們發展出一種新穎的無接面電晶體,利用單分子層摻雜技術完成球殼摻雜並可不受限於通道體積,由於摻雜僅在表面,閘極會有較佳的控制力(電流開關比>106),因為該技術可減少隨機摻雜不穩定性,同時也將抑制元件臨界電壓不穩定性、次臨界擺幅劣化的問題。 最後,我們利用新穎二氧化碳雷射來提升摻雜物的活化,且該雷射具有未熔融且選擇性區域退火的優勢,相較於僅以單分子層摻雜技術與微波退火製作的球殼摻雜無接面電晶體,利用單分子層摻雜技術結合微波退火與二氧化碳雷射,球殼摻雜無接面電晶體則有更好的元件特性(電流開關比>107)及驅動電流的改善(提升160%以上)。在此也同時探討摻雜物活化的機制,先利用微波退火將摻雜物擴散至矽基板表面,接著利用二氧化碳雷射活化位於間隙位置的摻雜物。此方法應用於塊狀基板式鰭型電晶體亦有良好的元件特性,因此對於三維堆疊元件積體電路的發展將擁有極大的潛力。
For the state-of-the-art CMOSFETs technology, the fabrication process for short channel effect control will be much more complicated. To solve the problems of severe leakage and subthreshold slope degradation, formation of junctions in the source/drain regions will be an important issue for reducing the dimension of transistors, especially for junction depth and resistivity. Because high temperature annealing results in serious dopant diffusion, microwave annealing (MWA) will be an ideal technique to activate dopants and achieve ultra-shallow and abrupt doping profiles at low temperature. First, phosphorus, arsenic and BF2 implants in Si were annealed by MWA or rapid thermal annealing (RTA). Compared with the conventional RTA process, the temperature of dopant activation by MWA could be 80 to 140 °C reduction at the same sheet resistance. Therefore, MWA has the great advantage of forming ultra-shallow junction with low resistivity and without diffusion. Besides showing the trend of sheet resistance versus temperature by MWA and RTA, the substrate temperature is also discussed. Due to the combination of substrate temperature and coupling of microwave energy, the dopants could be activated at low temperature. On the other hand, device fabrication process will have some doping problems in three-dimensional structure. Due to the limitation of non-uniform vertical doping profile in conventional implantation, doping technology causes a challenge in fabrication. In this dissertation, a new doping method utilizing a chemical molecular reaction on silicon surface is developed to reach conformal, ultra-shallow, and damage-free properties. Furthermore, the self-limit quality of molecular reaction can have a better controllability on dopant distribution, which is more suitable in next technology node. We introduce the influence of the ultra-shallow regions formed by molecular doping for tri-gate transistors and the simplification process of device fabrication. Moreover, microwave annealing will be utilized to form shallow doping regions to enhance the electrical characteristics of devices. In addition, we discuss about the influence of different annealing techniques and the thermal process times on the dopant distribution of source/drain regions and the gate dielectric. With device dimension scaling, short channel effect and random dopant fluctuation are serious problems for conventional MOSFETs. A junctionless (JL) transistor is a suitable advanced FinFET candidate owing to simple processing and longer effective gate length. However, variability of JLFET performance due to random dopant fluctuation by ion implantation is projected to be a serious problem as the dopant atoms become increasingly random. It may also degrade the device performance due to quantum confinement and large series resistance. Additionally, to effectively modulate the doped region, the volume of the body must be small enough for a better gate control, bottlenecking the on-current and limiting the feasibility of JLFET. In order to solve the problems, we propose a novel JLFinFET structure with a size-quantum confinement-free fin width and a shell doping profile (SDP) formed by molecular monolayer doping (MLD). Due to the proximity of dopanted region to the gate, the device with a shallower doping depth exhibits better gate control (ION/IOFF > 106). And the reduction of VTH variation and subthreshold swing degradation is also resulted from the suppression of random dopant fluctuation. Finally, a novel CO2 laser spike annealing (COLSA) with nonmelting and selective-heating feature is used to enhance dopant activation. Formed by MLD method and MWA+COLSA, a poly-Si JLFinTFT with a novel SDP shows excellent performance (ION/IOFF >107) and on-current enhancement (>160%). The mechanism of dopant activation is investigated here, which MWA drives in and partially activates the dopants and COLSA heats the others occupied in the interstitial sites. The method is also applied in bulk FinFET structure, showing the same results with poly-Si JLFinTFTs. Our results reveal the potential for 3D stacked ICs applications.
URI: http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070082009
http://hdl.handle.net/11536/138754
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