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dc.contributor.authorLin, CPen_US
dc.contributor.authorMao, YHen_US
dc.contributor.authorTsui, BYen_US
dc.date.accessioned2014-12-08T15:19:37Z-
dc.date.available2014-12-08T15:19:37Z-
dc.date.issued2005-03-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2005.843929en_US
dc.identifier.urihttp://hdl.handle.net/11536/13957-
dc.description.abstractHigh-performance poly-Si thin-film transistors (TFTs) with fully silicided source/drain (FSD) and ultrashort shallow extension (SDE) fabricated by implant-to-silicide (ITS) technique are proposed for the first time. Using the FSD structure, the S/D parasitic resistance can be suppressed effectively. Using the ITS technique, an ultrashort and defect-free SDE can also be formed quickly at about 600 degreesC. Therefore, the FSD poly-Si TFTs exhibits better current-voltage characteristics than those of conventional TFTs. It should be noted that the on/off current ratios of FSD poly-Si TFT (W/L = 1/4,mum) is over 3.3 x 10(7), and the field-effective mobility of that device is about 141.6 (cm(2)/Vs). Moreover, the superior short-channel characteristics of FSD poly-Si TFTs are also observed. It is therefore believed that the proposed FSD poly-Si TFT is a very promising TFT device.en_US
dc.language.isoen_USen_US
dc.subjectimplant-to-silicide (ITS)en_US
dc.subjectsilicide source/drain (S/D)en_US
dc.subjectthin-film transistor (TFT)en_US
dc.titleHigh-performance poly-Si TFTs fabricated by implant-to-silicide techniqueen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2005.843929en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume26en_US
dc.citation.issue3en_US
dc.citation.spage185en_US
dc.citation.epage187en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000227262500020-
dc.citation.woscount12-
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