基於良率增置電源凸塊以強化電源供應網絡之可靠性

Abstract

由於生醫晶片與目前電子產品所需求的可靠度不同，電子產品可在三五年之間進行汰換，但生醫領域之晶片則使用年限較長，其可靠度與穩定性必須被強化。在本篇論文中所提出的方法即能夠有效提升晶片之可靠度與穩定性。我們可以知道在封裝及使用過程中，電源凸塊的缺陷可能會造成電源供應不足，進而導致整體良率下降。在考慮封裝過程中每個凸塊所會產生的良率前提下，我們提出了增置額外凸塊的方法以強化整體電源供應網絡。我們提出的方法可藉由精確地估計最差負載良率的位置以及減少凸塊的增置數量，更有效率地增置凸塊以增強整體良率。本論文將使用蒙地卡羅演算法以驗證我們的實驗結果，並與前人作法進行比較。

Electronic products are able to discard and exchange during a period of 3 to 5 years; in other hand, biomedical science chips are often used for a long time. Since the above mentioned difference between biomedical science chips and current electronic products, the reliability and stability of chips should be increased in biomedical science chips design process. In this paper, we propose an effective method to promote reliability and stability of chips. We have known that during package manufacturing and using process, open defects of power bumps may cause insufficient power supply and decrease the power network yield. This work presents a redundant power bump insertion method to intensify power supply network by considering the solder bump yield during the package process. The proposed method can efficiently assign redundant bumps by accurately estimating the location of worst load yield and minimizing the amounts of redundant bumps to enhance the power network yield. We use Monte-Carlo method to verify our experimental result and compare the result with the previous work.