標題: MOS-bounded diodes for on-chip ESD protection in deep submicron CMOS process
作者: Ker, MD
Lin, KH
Chuang, CH
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: electrostatic discharge (ESD);diode;poly-bounded diode;MOS-bounded diode;ESD protection
公開日期: 1-三月-2005
摘要: New diode structures without the field-oxide boundary across the p/n junction for ESD protection are proposed. A NMOS (PMOS) is especially inserted into the diode structure to form the NMOS-bounded (PMOS-bounded) diode, which is used to block the field oxide isolation across the p/n junction in the diode structure. The proposed N(P)MOS-bounded diodes can provide more efficient ESD protection to the internal circuits, as compared to the other diode structures. The N(P)MOS-bounded diodes can be used in the I/O ESD protection circuits, power-rail ESD clamp circuits, and the ESD conduction cells between the separated power lines. From the experimental results, the human-body-model ESD level of ESD protection circuit with the proposed N(P)MOS-bounded diodes is greater than 8 kV in a 0.35-mu m CMOS process.
URI: http://dx.doi.org/10.1093/ietele/e88-c.3.429
http://hdl.handle.net/11536/13980
ISSN: 0916-8524
DOI: 10.1093/ietele/e88-c.3.429
期刊: IEICE TRANSACTIONS ON ELECTRONICS
Volume: E88C
Issue: 3
起始頁: 429
結束頁: 436
顯示於類別:期刊論文