針對5μm及7.5μm像素使用0.11微米製程技術背面照光式影像感測器之模擬研究

Abstract

隨著CMOS影像感測器的發展，感光能力不足、雜訊大、敏感度等問題陸續有了解決的方案出現。在這些感測器中，四顆電晶體式的背面照光影像感測器尤其受到矚目。由於製程尺寸的縮小演進，在小尺寸的CMOS影像感測器中將會碰到一些困難如：像素彼此間會因為距離太近而受到干擾，訊號在傳遞的過程中受到延遲，暗電流影響成像的品質及影像的雜訊等。因此，在不同狀態下載子的運動所造成的影響是我們必須去了解的課題。 在本論文中，將採用TCAD Sentaurus Device模擬平台來針對0.11微米製程技術的影像感測器包含5微米及7.5微米像素分別進行模擬。藉由調整不同的離子佈值濃度及能量大小，得到相對應的成像參數如: pinned voltage, image lag及full well capacity等。利用模擬結果與量測值進行比較後，將可以得到各個參數變化趨勢。期許藉由本模型的建置，能更加幫助製程技術發展，並設計更理想的影像感測器。

In the development of CMOS image sensor, the insufficient of photosensitivity, noise, sensitivity and other issues have been resolved. Among different types of CIS sensors, the performance of four transistors back side illumination (4T BSI) is particularly superior. During the process of size miniature, the small-size CMOS pixels faces the challenges such as the crosstalk between pixels, image lag, dark current that affects the quality of imaging. Hence, the carrier transport and electric potential under different operation conditions are certainly worth further study. In this work, the TCAD Sentaurus Device simulation platform is used to simulate the 0.11μm CMOS technology for backside illumination CMOS image sensor and analysis of 5μm and 7.5μm pixels. The results for the variation of dosage and implantation energies in different layers such as pinned voltage, image lag and full well capacity will be calculated and compared to the measurements. By comparing the simulation results with the measurements, the device performance trend with pixel parameter variations can be obtained. It is expected that the development of the image sensor will be assisted by the establishment of the TCAD simulation and design.