非線性電阻式記憶體於三維超高密度儲存級記憶體之應用

Abstract

由於互補式金屬氧化物半導體（CMOS）即將接近其物理微縮極限，考慮其它可持續提升性能的替代運算架構成為一項急迫的任務。此外，新一代“大數據”與“雲端計算”中，數據中心必須處理遠程運算與百萬兆次等級的資料儲存，對傳統運算結構形成嚴峻挑戰。存在於主記憶體如動態隨機存取記憶體（DRAM）和靜態隨機存取記憶體（SRAM），與儲存記憶體如快閃記憶體（NAND flash）之間過長的資料提取時間，是傳統運算架構發展的主要瓶頸，這將導致雲端計算基礎設施成本過高與大數據存儲空間不足。因此，近年來具有高存取速度與高容量的儲存級記憶體（Storage-class memory; SCM）的概念被提出，預期能夠進化或改革當前之運算系統。 在新興的記憶體技術中，電阻式隨機存取記憶體（RRAM）由簡單的金屬 - 絕緣體 - 金屬（MIM）結構組成，因切換時間快速（< 10 ns），可實現高密度集成的交錯式記憶體陣列，和良好的微縮能力（< 10 nm）已引起廣泛之關注。除此之外它還展現出高度潛力於更高集成密度的三維（3D）垂直電阻式記憶體(Vertical RRAM; V-RRAM)架構上，可大幅較低單位位元成本，因而成為三維NAND快閃記憶體於儲存級記憶體應用上的主要競爭對手。 此論文研究以雙氧化層TaOx/TiO2為基礎的RRAM，本元件展現許多成為儲存級記憶體的優良特性包括：（1）超過1012次的切換操作容忍度(Endurance)，（2）無需施加形成電壓(Forming free)，（3）展現自我限流特性(Compliance free);（4）自我整流比(Self-rectifying ratio)高達105，符合高密度三維垂直RRAM之需求，（5）展現多準位（Multiple-level per cell, MLC）的能力，（6）可適用於低溫下的製程工藝，和（7）使用與半導體工業相容之材料。此外，這種自我整流之TaOx/TiO2 RRAM已成功地整合至三維雙層垂直結構，此側壁式結構將有助於元件微縮提高儲存密度，其記憶體單元電流展現可與元件面積同時微縮之能力，微安培以下電流操作(Sub-μA)與高自我整流比超過103，可克服在導電絲(Filament)型態之RRAM中，其操作電流過大與切換不穩定之困境，無須額外選擇器元件(Selector)展現超高密度儲存之潛力。此非導電絲RRAM展現較少的切換不穩定與電流微縮能力，一系列綜合實驗設計用以探討每一層之功能特性與其金-介-介-金(MIIM)結構之電性展現。經由實驗發現與數據分析，我們提出兩種非導電絲切換物理模型包含，(1) 均值能障調變(Homogeneous barrier modulation)模型與(2) 介電質-金屬 轉換(Insulator-metal transition)模型 均能定性地描述導電物理機制，其數值模擬結果也能定量地展現非導電絲傳導特性。此外，氧化鉭(TaOx)層可控制元件電流與調整自我整流比，此特徵是發展高密度交錯式RRAM記憶體陣列之重要因素。最後，我們改進的資料保存時間和切換操作容忍度，優化記憶體之特性，使用相同的3D V-RRAM技術將有機會實現非揮發性記憶體(NVM)般的資料保留能力與工作記憶體(Working memory)的操作容忍度，實現使用單一記憶體架構之多功能儲存級記憶體。

Since the CMOS scaling is approaching its physical limitation, there is an urgent need to develop alternative computing paradigms that can satisfy future demands on high-performance computation. In addition, in the era of “Big Data” and “Cloud Computing”, data centers have to process exa-scale data and I/O requests remotely, which also pose significant challenges on the conventional computing hierarchy. The wide gap of the latency time between working memory such as DRAM and SRAM, and storage memory such as NAND flash has become a main performance bottleneck in the conventional memory hierarchy, which leads to high cost and insufficient capacity in data storage. The concept of storage-class memory (SCM) with low latency time and large capacity provides an opportunity to reform memory hierarchy in the future. Among numerous emerging memory technologies, resistive-switching random access memory (RRAM) has gained much attention because of its simple metal-insulator-metal (MIM) structure, fast speed (< 10 ns), high integration density in crossbar array, and excellent scalability (< 10 nm). Moreover, it shows high potential for the cost-effective three-dimensional (3D) vertical RRAM (V-RRAM) architecture that could compete with 3D NAND flash for SCM applications. This dissertation investigates a bi-layer TaOx/TiO2 RRAM device, which shows numerous highly desired features for SCM including: (1) extremely high endurance over 1012 cycles, (2) forming free, (3) self compliance, (4) self rectification ratio up to 105 required for ultrahigh-density 3D vertical RRAM, (5) multiple-level per cell (MLC) capability, (6) room temperature fabrication process, and (7) usage of fab-friendly materials. In addition, this self-rectifying TaOx/TiO2 RRAM is successfully integrated into 3D double-layer vertical structures with steep vertical sidewall, showing promising potential for ultrahigh-density data storage. The vertical cell shows high self-rectifying ratio over 103, area-scalable operating current down to sub-μA, and little cycling variation, which overcomes the intrinsic trade-off between operating current and variability in filamentary RRAMs. A series of comprehensive experiments were designed to clarify the roles of each layer and the switching mechanism in this MIIM structure. Through experimental findings and data analysis, we propose two types of physical models for this non-filamentary switching RRAM including, (1) homogeneous barrier modulation model and (2) insulator-metal transition model, both of them could qualitatively describe its conduction mechanism while it also could be quantitatively demonstrated by numerical simulation. The TaOx layer modulates switching current and self-rectifying ratio that are essential in high-density crossbar RRAM array. Finally, a methodology of improving retention time and predicting device endurance is presented. The unique trade-off between retention and endurance shows great potential for monolithically integrating storage-type SCM with NVM-like retention and memory-type SCM with DRAM-like endurance by using an identical 3D V-RRAM technology