Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 李奎佐 | zh_TW |
dc.contributor.author | 孟慶宗 | zh_TW |
dc.contributor.author | Lee. Kuei-Tso | en_US |
dc.contributor.author | Meng,Chin-Chun | en_US |
dc.date.accessioned | 2018-01-24T07:39:40Z | - |
dc.date.available | 2018-01-24T07:39:40Z | - |
dc.date.issued | 2017 | en_US |
dc.identifier.uri | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070360273 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/140708 | - |
dc.description.abstract | 本篇論文共有三個主題,包含5-GHz功率放大器、功率偵測對數放大器以及小面積耦合器,皆利用TSMC 0.18 um SiGe BiCMOS製程來實現。 第一部分為5-GHz雙模態功率放大器設計,利用電晶體面積縮小的方法來提升低功率輸出時的效率。第二部分介紹功率檢測器,以平行相加之連續偵測對數放大器架構來實現。 第三部分為小面積耦合器設計,本耦合器長度設計在遠小於四分之一波長處,並具有低耦合量、低損耗、高隔離度之特性。最後,將上述電路整合,達到5-GHz功率放大器之功率偵測之效果。 | zh_TW |
dc.description.abstract | This thesis consists of three parts, including 5-GHz power amplifiers, logarithmic amplifiers, and small couplers. All of the circuits above are implemented with TSMC 0.18 um SiGe BiCMOS process. In the first part, the 5-GHz dual mode Power Amplifier is presented. The efficiency is enhanced by the method of physical-size reduction. The second part introduces a power detector, which is implemented with the Successive Detection Logarithmic Amplifier topology. The third part introduces the design of small couplers. The length of this coupler is far smaller than the quarter wavelength, and characteristics of low coupling, low loss, and high isolation. Finally, the circuits above are integrated together on a chip to achieve the power detection of a 5-GHz power amplifier. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 功率放大器 | zh_TW |
dc.subject | 對數放大器 | zh_TW |
dc.subject | 耦合器 | zh_TW |
dc.subject | Power Amplifier | en_US |
dc.subject | Logarithmic Amplifier | en_US |
dc.subject | Coupler | en_US |
dc.title | 使用0.18 μm SiGe BiCMOS 製程實現具雙對數放大器及小面積耦合器做功率偵測之 5-GHz 雙模態功率放大器 | zh_TW |
dc.title | 5-GHz Dual-Mode Power Amplifiers with Dual Logarithmic Amplifiers and a Small Coupler for Power Detection Using 0.18 μm SiGe BiCMOS Process | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電信工程研究所 | zh_TW |
Appears in Collections: | Thesis |