标题: 考量时脉下异质型FPGA之增量式丛集
Clock-Aware Incremental Packing for Heterogeneous FPGAs
作者: 陈辰
陈宏明
Chen, Chen
Chen, Hung-Ming
电子研究所
关键字: 摆置器;丛集;时脉;FPGA;placement;packing
公开日期: 2017
摘要: 随着科技日新月异,在FPGA架构及电路都愈渐复杂之下,丛集和布局两个电子设计自动化的步骤越显得重要,其结果都将影响最后绕线的品质以及电路的效能。
在丛集的这个步骤中,在同时考量逻辑相关的电路联系以及时脉配置的状况下将电路的基础元件包装进可设定逻辑区块中,并尝试极小化可设定逻辑区块的数量和外部的绕线。
而现代的异质型FPGA架构中,除了基本的输入输出元件区块、可设定逻辑区块外,还有嵌入式的记忆体区块和数位讯号处理区块,在布局阶段需要针对这些根据资源的分布来做功能的调整及优化。
此外,FPGA多重时脉的绕线架构也是会对布局有许多的影响,需要在丛集和布局阶段对其做额外的考虑。

在这篇论文里,我们提出了一个使用增量式丛集方法的异质型FPGA摆置器。在丛集阶段,我们对所有元件进行快速的初步布局,接着藉由交替的布局及丛集并同时考量正反气的控制讯号、时脉的分布和绕线的状况来对基础元件根据其相关密切性进行丛集。
而在布局阶段,我们采用了线长驱动的全域摆置器,其中有许多针对异质型FPGA架构来进行调整的技巧,包含
(1)针对复杂逻辑元件进行位置校正、
(2)藉由全域性绕线器预估壅塞程度来进行区块动态丛集/分割、
(3)针对多重时脉进行动态时脉规划
,最后藉由布局迁移法、布局布局合法化及详细布局完成整个摆置器。
实验结果显示以上所述之方法皆可有效率的提升布局的品质。
Packing and Placement are two crucial stages for FPGA implement. In the design flow, the basic logic units, such as look-up-tables (LUTs) and flip-flops (FFs), have to be merged into configurable logic blocks (CLBs) before placement. How the basic logic units are clustered in the packing stage has a great impact on the placement quality.

This work introduces an analytical placement framework for heterogeneous FPGAs through an incremental packing algorithm. In the packing stage, we first perform a fast wirelength-driven placement for the basic logic units. From the initial placement solution, we alternatively implement affinity-based clustering and placement with gradually shrinking legalization force while taking the control signal constraints into consideration.

In the placement stage, a quadratic global placer is implemented with the techniques of handling the heterogeneity, routing congestion estimation by a global router and congestion-driven packing$/$unpacking. An incremental placer is performed after the global placement for closing the gap between global placement and detailed placement. Legalizer and detailed placer are adopted to legalize the blocks and furtherly reduce the wirelength. Experimental results show that the proposed methodologies can effectively improve placement solutions.
URI: http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070450244
http://hdl.handle.net/11536/141591
显示于类别:Thesis