熱製程對鍺金屬絕緣層半導體元件上閘極介電質品質影響之研究

Abstract

由於鍺相對於矽擁有較高的載子遷移率，所以它被視為具有希望取代矽的通道材料之一。然而鍺的次氧化物具有熱不穩定的特性，GeO的揮發將會造成界面劣化並影響其電特性，因此在這篇論文中我們將研究不同的熱製程對於金屬-絕緣層-鍺電容器之影響。 首先， 我們將討論施加不同的閘極前熱處理對於鍺電容器的影響。我們發現在氧化鍺中，透過增加高價位氧化態的量和減少低價位氧化態的量將能獲得較好的界面品質，而緻密化處理和表面退火這兩種閘極前熱處理將增加鍺的不同氧化態。在定義主動區前的緻密化處理過程中，在界面將會同時產生氧化鍺和鍺的化合物。另一方面，相對於在氮氣環境中進行表面退火，在真空環境下進行表面退火將可以更有效地分解氧化鍺並鈍化表面。因此經緻密化處理後，在氮氣環境下進行表面退火將不能完全地分解鍺的化合物，但在真空環境下卻可以有效的分解並鈍化表面。在完整的分解之後，氧氣電漿將能夠在接下來的製程中形成更多的高價位氧化態。經比較漏電流密度和電荷缺陷密度，藉由在氮氣下緻密化處理搭配真空下表面退火將被認為優於其它的閘極前熱處理方法。 其次將探討閘極的氧化成長和高介電層沉積的溫度效應，根據XPS分析和電性，GeO的揮發可能有兩種機制:發生在沉積過程與發生在沉積後退火或燒結過程。因此我們認為高溫的氧化將幫助氧化鍺的成長而低溫的沉積將減少GeO在沉積過程中揮發。這種方法可以在界面上留下較多的氧化鍺並達成較低的漏電流密度和電荷缺陷密度。 第三部分將討論沉積後退火對二氧化鉿和二氧化鋯樣品的影響，增加沉積後退火溫度將會使得GeO揮發增加並擴散更多到高介電層，這將會造成二氧化鋯產生部分結晶並且增加它的介電常數。此外，在相同的沉積後退火溫度下，我們還發現二氧化鋯的樣品比二氧化鉿的樣品具有更厚的界面層，這可能是因為二氧化鋯會讓鍺會被氧化更多所造成。 最後，我們結合了這些較好的熱處理方式來製作優化的元件。藉由增加高價位的氧化態，我們取的了一個具有等效氧化厚度0.8奈米、低漏電電流(1.5×10-2 A/cm2)、很小的遲滯現象(~155 mV)以及在能量位於價帶電位0.2電子伏特位置的電荷缺陷密度9.27×1011(eV-1cm−2)的電容。我們預期這些成果將可以應用在改善鍺基板金氧半場效電晶體的特性上。

Germanium is considered as one of the promising channel materials owing to its higher bulk carrier mobility than silicon. However, germanium sub-oxide is thermodynamically unstable. GeO volatilization will degrade the interface and impact the electric characteristics. Therefore, the effect of various thermal processes on germanium metal-insulator-semiconductor capacitor quality are studied in this thesis. First, applying various pre-gate thermal treatments on germanium capacitor are discussed. We can find that increasing germanium oxide with more amount of high oxidation states and less amount of low oxidation states can get better interface quality. Both densification and surface annealing will increase oxidation states of germanium differently. Densification before active area patterning will generate germanium oxides and germanium compounds at the interface simultaneously. On the other hands, surface annealing in vacuum can desorb germanium oxides more and passivate surface better than surface annealing in N2 ambient. Thus, using surface annealing in N2 ambient after densification cannot desorb the germanium compounds completely but surface annealing in vacuum after densification can desorb and passivate germanium surface effectively. After complete desorption, O2 plasma can form more amount of high oxidation state in following process. Compared with leakage current density and interface state density, it is suspected that combining densification in N2 ambient and surface annealing in vacuum is better than other pre-gate treatments. Second, the effects of gate stack formation and deposition temperatures are investigated. According to XPS analysis and electrical characteristics, there might have two possible mechanisms in GeO volatilization: GeO volatilization during deposition, and GeO volatilization during PDA and sintering. Therefore, it is suspected that higher temperature of plasma oxidation can help germanium oxide formation and lower temperature of deposition can decrease GeO volatilization during the deposition process. This method can remain more amount of germanium oxide at the interface and achieve lower interface state density and leakage current density. Third, the effect of PDA temperature on HfO2 and ZrO2 samples are discussed. Increasing the PDA temperature will make GeO volatilized and diffused into high-k film more. It will make ZrO2 partially crystalized and increase the k-value. Besides, we find ZrO2 sample has thicker interfacial layer than HfO2 sample at same PDA temperature. It is suspected that germanium might be oxidized more at the same PDA temperature on the ZrO2 sample. Finally, the better process conditions of previous thermal treatments are combined to fabricate the optimized device. By increase the amount of high oxidation states, the capacitor with EOT about 0.8 nm, low leakage current density of 1.5×10-2 A/cm2 at |Vg –VFB|=1 V, small hysteresis (~155 mV), low interface state density of 9.27×1011 eV-1cm−2 at E− EV = 0.2 eV has achieved in this thesis. We expected these achievements can be applied to improve the performance of Ge MOSFETs.