Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 劉旻政 | zh_TW |
dc.contributor.author | 趙昌博 | zh_TW |
dc.contributor.author | Liu, Ming-Cheng | en_US |
dc.contributor.author | Chao, Chang-Po | en_US |
dc.date.accessioned | 2018-01-24T07:42:37Z | - |
dc.date.available | 2018-01-24T07:42:37Z | - |
dc.date.issued | 2017 | en_US |
dc.identifier.uri | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070458024 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/142726 | - |
dc.description.abstract | 無線傳感網絡的傳輸介質包括使用紅外線,無線電波和光通訊,本論文提出了一種用於IoT(物聯網)標籤的光接收器,利用可見光通訊作為單向通訊橋梁,標籤接收到指令後以RF訊號的方式回傳訊息。該標籤未來將結合太陽能電池板實現無電池的目標,由於標籤面積小,太陽能電池板的電源電壓和能量非常有限,因此該標籤設計需滿足低電壓,低功耗,面積小。光感測器和太陽能電池板皆使用一般市售常見的產品,因此考慮到一般市售的LED燈具和光感測器的頻寬,頻寬設置為1MHz。前端光接收器包括光感測器(光電二極體元件),轉阻放大器(TIA, Transimpedance amplifier)及訊號回復電路組成,目的是將光接收器電流信號轉換為電壓信號,以便於產生信號。最後,時脈與資料回復電路設計架構為無參考時脈之全數位式鎖相迴路,此設計能將接收之串列資料正確的回復,再經由微處理器將資料解碼並且控制。所提出之電路使用TSMC 0.18m 1P6M製程模擬與實現,前端光接收器及資料回復電路之功耗約為6.24W,資料傳輸速率可達1Mbit/s。 | zh_TW |
dc.description.abstract | Wireless transmission network transmission media, including the use of infrared, RF and optical communication. An optical receiver of the IoT (Internet of Things) tags is proposed. The visible light communication is used as a one-way communication bridge. After the tags receives the signal, it uses the way of the RF signal to return message. The tags will combine the solar cells to achieve the goal of battery-less. The tags have to design the low voltage, low power consumption, small area. Light sensors and solar panels are commonly used in common commercial products. The bandwidth of 1MHz is set to be approximately the same as the commercially LED and light sensor. The front end optical receiver consists of a light sensor (photodiode element), a transimpedance amplifier (TIA) and a signal recovery circuit. The purpose is to convert the optical receiver current signal into a voltage signal to generate a signal. Finally, the clock and data recovery circuit which is an all-digital reference-less phase-locked loop design is to generate a recovered clock to retime the data, the design can receive the correct data to reply, and then through the microprocessor to decode and control the data. The proposed circuits are simulated and fabricated via the TSMC 0.18m 1P6M standard CMOS process. The power consumption of the optical receiver is approximate as 6.24W, and the data rate achieves 1Mbit/s | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 光接收器 | zh_TW |
dc.subject | 時脈與資料回復電路 | zh_TW |
dc.subject | 轉阻放大器 | zh_TW |
dc.subject | 可見光通訊 | zh_TW |
dc.subject | 物聯網 | zh_TW |
dc.subject | Optical receiver | en_US |
dc.subject | clock and data recovery | en_US |
dc.subject | transimpedance amplifier | en_US |
dc.subject | visible light communication | en_US |
dc.subject | Internet of Things | en_US |
dc.title | 應用於可見光接收器之低功耗無參考時脈資料回復電路設計與實現 | zh_TW |
dc.title | Low-power and Reference-Less data and clock recovery circuit for visible light receivers | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 光電系統研究所 | zh_TW |
Appears in Collections: | Thesis |