完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, CY | en_US |
dc.contributor.author | Lin, HY | en_US |
dc.contributor.author | Lei, TF | en_US |
dc.contributor.author | Cheng, JY | en_US |
dc.contributor.author | Chen, LP | en_US |
dc.contributor.author | Dai, BT | en_US |
dc.date.accessioned | 2014-12-08T15:02:49Z | - |
dc.date.available | 2014-12-08T15:02:49Z | - |
dc.date.issued | 1996-03-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/55.485180 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/1437 | - |
dc.description.abstract | A top-gate p-channel polycrystalline thin film transistor (TFT) has been fabricated using the polycrystalline silicon (poly-Si) film as-deposited by ultrahigh vacuum chemical vapor deposition (UHV/CVD) and polished by chemical mechanical polishing (CMP), In this process, long-term recrystallization in channel films is not needed. A maximum field effect mobility of 58 cm(2)/V-s, ON/OFF current ratio of 1.110(7), and threshold voltage of -0.54 V were obtained. The characteristics are not poor. In this work, therefore, we have demonstrated a new method to fabricate poly-Si TFT's. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Fabrication of thin film transistors by chemical mechanical polished polycrystalline silicon films | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/55.485180 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 17 | en_US |
dc.citation.issue | 3 | en_US |
dc.citation.spage | 100 | en_US |
dc.citation.epage | 102 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:A1996TX68200007 | - |
dc.citation.woscount | 29 | - |
顯示於類別: | 期刊論文 |