標題: | Characterization and modeling of SET/RESET cycling induced read-disturb failure time degradation in a resistive switching memory |
作者: | Su, Po-Cheng Hsu, Chun-Chi Du, Sin-I Wang, Tahui 電機學院 電子工程學系及電子研究所 College of Electrical and Computer Engineering Department of Electronics Engineering and Institute of Electronics |
公開日期: | 7-Dec-2017 |
摘要: | Read operation induced disturbance in SET-state in a tungsten oxide resistive switching memory is investigated. We observe that the reduction of oxygen vacancy density during read-disturb follows power-law dependence on cumulative read-disturb time. Our study shows that the SET-state read-disturb immunity progressively degrades by orders of magnitude as SET/RESET cycle number increases. To explore the cause of the read-disturb degradation, we perform a constant voltage stress to emulate high-field stress effects in SET/RESET cycling. We find that the read-disturb failure time degradation is attributed to high-field stress-generated oxide traps. Since the stress-generated traps may substitute for some of oxygen vacancies in forming conductive percolation paths in a switching dielectric, a stressed cell has a reduced oxygen vacancy density in SET-state, which in turn results in a shorter read-disturb failure time. We develop an analytical read-disturb degradation model including both cycling induced oxide trap creation and read-disturb induced oxygen vacancy reduction. Our model can well reproduce the measured read-disturb failure time degradation in a cycled cell without using fitting parameters. Published by AIP Publishing. |
URI: | http://dx.doi.org/10.1063/1.5009042 http://hdl.handle.net/11536/144200 |
ISSN: | 0021-8979 |
DOI: | 10.1063/1.5009042 |
期刊: | JOURNAL OF APPLIED PHYSICS |
Volume: | 122 |
Appears in Collections: | Articles |