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dc.contributor.authorChiu, Yu-Chienen_US
dc.contributor.authorCheng, Chun-Huen_US
dc.contributor.authorChang, Chun-Yenen_US
dc.contributor.authorTang, Ying-Tsanen_US
dc.contributor.authorChen, Min-Chengen_US
dc.date.accessioned2018-08-21T05:53:53Z-
dc.date.available2018-08-21T05:53:53Z-
dc.date.issued2017-03-01en_US
dc.identifier.issn1862-6254en_US
dc.identifier.urihttp://dx.doi.org/10.1002/pssr.201600368en_US
dc.identifier.urihttp://hdl.handle.net/11536/145296-
dc.description.abstractIn this work, we report a ferroelectric memory with strainedgate engineering. The memory window of the high strain case was improved by similar to 71% at the same ferroelectric thickness. The orthorhombic phase transition (from ferroelectric to antiferroelectric transition) plays a key role in realizing negative capacitance effect at high gate electric field. Based on a reliable first principles calculation, we clarify that the gate strain accelerates the phase transformation from metastable monoclinic to orthorhombic and thus largely enhances the ferroelectric polarization without increasing dielectric thickness. This ferroelectric strain technology shows the potential for emerging device application.en_US
dc.language.isoen_USen_US
dc.subjectferroelectricsen_US
dc.subjectstrainen_US
dc.subjectnegative capacitanceen_US
dc.subjectHfZrOen_US
dc.subjectphase transitionsen_US
dc.subjecttransistorsen_US
dc.titleInvestigation of strain-induced phase transformation in ferroelectric transistor using metal-nitride gate electrodeen_US
dc.typeArticleen_US
dc.identifier.doi10.1002/pssr.201600368en_US
dc.identifier.journalPHYSICA STATUS SOLIDI-RAPID RESEARCH LETTERSen_US
dc.citation.volume11en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000397999700002en_US
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