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dc.contributor.authorChuang, Shang-Shiunen_US
dc.contributor.authorCho, Ta-Chunen_US
dc.contributor.authorSung, Po-Jungen_US
dc.contributor.authorKao, Kuo-Hsingen_US
dc.contributor.authorChen, Henry J. H.en_US
dc.contributor.authorLee, Yao-Jenen_US
dc.contributor.authorCurrent, Michael I.en_US
dc.contributor.authorTseng, Tseung-Yuenen_US
dc.date.accessioned2018-08-21T05:54:29Z-
dc.date.available2018-08-21T05:54:29Z-
dc.date.issued2017-01-01en_US
dc.identifier.issn2162-8769en_US
dc.identifier.urihttp://dx.doi.org/10.1149/2.0011707jssen_US
dc.identifier.urihttp://hdl.handle.net/11536/146006-
dc.description.abstractWe focused on the damage-free monolayer doping (MLD) method starting from a chemical reaction of molecules on Si and Ge surfaces and applied it to 3D MOSFET device fabrication. MLD methods were verified by different material analysis, such as XPS and Raman spectroscopy. For a Si-based FinFET structure, compared to the device with ion implantation, the short channel effect of source and drain (SD) extension regions formed by MLD are improved. The shallower SD extension regions formed by low-temperature microwave annealing (MWA) are expected to the device showing better electrical properties than deeper ones formed by RTA. In addition, formation of the n- and p-type doping in Ge by MLD was also investigated. Even after annealing at 800 degrees C for 300 sec by RTA, the p-type doping still exhibits a low surface doping concentration due to the low diffusion coefficient of B in Ge and surface diffusion limitations at the MLD/Ge interface. By using a combination of RTA and CO2 laser spike annealing (LSA), MLD n-type doping in Ge are formed with junction depths of approximate to 15 nm, and peak concentration of approximate to 6 x 10(20) atoms/cm(3). The dopant activation for the MLD-doped channels of Ge junctionless FinFETs (JLFinFETs) is improved after the additional CO2 LSA. (C) 2017 The Electrochemical Society. All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleUltra-Shallow Junction Formation by Monolayer Doping Process in Single Crystalline Si and Ge for Future CMOS Devicesen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/2.0011707jssen_US
dc.identifier.journalECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGYen_US
dc.citation.volume6en_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000409027700029en_US
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