完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, Chi-Jen | en_US |
dc.contributor.author | Wang, Chung-Hsuan | en_US |
dc.contributor.author | Chao, Chi-chao | en_US |
dc.date.accessioned | 2018-08-21T05:56:39Z | - |
dc.date.available | 2018-08-21T05:56:39Z | - |
dc.date.issued | 2016-01-01 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/146476 | - |
dc.description.abstract | In this paper, new constructions of variable-rate quasi-cyclic low-density parity-check (QC-LDPC) codes are proposed. The criteria which guarantee that a higher-rate QC-LDPC code can be obtained by adding column-blocks to or removing row-blocks from the parity-check matrix of a given lower-rate QC-LDPC code are derived. Based on these criteria, new families of variable-rate QC-LDPC codes can he constructed. Simulation results show that the constructed codes provide a variety of error protection capabilities against different channel conditions. | en_US |
dc.language.iso | en_US | en_US |
dc.title | New Constructions of Variable-Rate QC-LDPC Codes by Adding Column-Blocks or Removing Row-Blocks | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF 2016 INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY AND ITS APPLICATIONS (ISITA 2016) | en_US |
dc.citation.spage | 389 | en_US |
dc.citation.epage | 393 | en_US |
dc.contributor.department | 電機工程學系 | zh_TW |
dc.contributor.department | Department of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000399119600079 | en_US |
顯示於類別: | 會議論文 |