Full metadata record
DC FieldValueLanguage
dc.contributor.authorTung, Chun-Teen_US
dc.contributor.authorWen, Kuei-Annen_US
dc.date.accessioned2018-08-21T05:56:49Z-
dc.date.available2018-08-21T05:56:49Z-
dc.date.issued2017-01-01en_US
dc.identifier.urihttp://hdl.handle.net/11536/146680-
dc.description.abstractThis paper presents MEMS multi-sensors with low power tunable-gain interface circuit that can be monolithically integrated in the ASIC compatible standard CMOS process. A high gain ultra-low power sustaining TIA amplifier circuit with PLL compactly has been integrated with the resonator-based core sensing structure. The proposed low-power readout circuit adopts Correlated Double Sampling (CDS) to suppress low frequency noise and compensate DC offset. The gyroscope sensitivity is designed to be 1.8 aF/degrees/sec within +/- 100 degrees/sec. The tunable sensitivity can be adjusted from 28 mV/fF to 224 mV/fF by fully-differential programmable-gain amplifier (PGA). The interface circuit has 61.12dB SNR under 500 KHz sampling rate.en_US
dc.language.isoen_USen_US
dc.subjectsilicon resonatoren_US
dc.subjectCMOS MEMS sensoren_US
dc.subjectreadouten_US
dc.subjectGyroscopeen_US
dc.subjectCorrelated Double Samplingen_US
dc.subjectTunable-Gainen_US
dc.subjectInterface Circuiten_US
dc.titleMULTI-SENSORY COMBINED INTEGRATED LOW POWER TUNABLE-GAIN INTERFACE CIRCUITen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2017 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC 2017)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000404176400147en_US
Appears in Collections:Conferences Paper