標題: Unsymmetrical Parallel Switched-Capacitor (UP-SC) Regulator with Fast Searching Optimum Ratio Technique
作者: Lin, Yen-Ting
Yang, Wen-Hau
Ma, Yu-Sheng
Lai, Yan-Jiun
Chen, Hung-Wei
Chen, Ke-Horng
Wey, Chin-Long
Lin, Ying-Hsi
Lin, Jian-Ru
Tsai, Tsung-Yen
交大名義發表
National Chiao Tung University
關鍵字: Unsymmetrical parallel switched-capacitor (UP-SC);fast searching optimum ratio (FSOR) technique;wide voltage conversion ratio
公開日期: 1-一月-2017
摘要: Different from conventional multiphase switched-capacitor (SC) DC-DC converters, the proposed unsymmetrical parallel switched-capacitor (UP-SC) regulator provides more controllable input variables to increase available conversion ratios for improved load regulation. Even under higher conversion ratio numbers, the UP-SC regulator uses the fast searching optimum ratio (FSOR) technique to search the destined ratio rapidly and to reduce the transient recovery time. Experimental results show the test chip fabricated in 0.25 mu m CMOS process increases the ratio number to 187 and 2389 in 3-stage and 4-stage SC regulators, respectively. Transient recovery time reduces from 26 mu s to 1.5 mu s in case of 7mA load current step.
URI: http://hdl.handle.net/11536/147026
期刊: ESSCIRC 2017 - 43RD IEEE EUROPEAN SOLID STATE CIRCUITS CONFERENCE
起始頁: 287
結束頁: 290
顯示於類別:會議論文