標題: Self-Organized Ge Nanospherical Gate/SiO2/Si0.15Ge0.85-Nanosheet n-FETs Featuring High ON-OFF Drain Current Ratio
作者: Liao, Po-Hsiang
Peng, Kang-Ping
Lin, Horng-Chih
George, Thomas
Li, Pei-Wen
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Ge-gate;SiGe nanosheet;junctionless FET;self organization
公開日期: 1-一月-2019
摘要: We reported experimental fabrication and characterization of Si0.15Ge0.85 n-MOSFETs comprising a gate-stacking heterostructure of Ge-nanospherical gate/SiO2/Si0.15Ge0.85-nanosheet on SOI (100) substrate in a self-organization approach. This unique gate-stacking heterostructure is simultaneously produced in a single oxidation step as a consequence of an exquisitely controlled dynamic balance between the concentrations of oxygen, Si, and Ge interstitials at 900 degrees C. Process-controlled tunability of nanospherical gate of 60-100 nm in diameter, gate oxide thickness of 3 nm, and Si0.15Ge0.85 nanosheet with compressive strain of -2.5% was achieved. Superior gate modulation is evidenced by subthreshold slope of 150 mV/dec and I-ON/I-OFF > 5 x 10(8) (I-OFF < 10(-6) mu A/mu m and I-ON > 500 mu A/mu m) measured at V-G = + 1V, V-D = + 1 V, and T = 80 K for our device with channel length of 75 nm.
URI: http://dx.doi.org/10.1109/JEDS.2018.2876519
http://hdl.handle.net/11536/148987
ISSN: 2168-6734
DOI: 10.1109/JEDS.2018.2876519
期刊: IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Volume: 7
起始頁: 46
結束頁: 51
顯示於類別:期刊論文