完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, Shih-Chieh | en_US |
dc.contributor.author | Lo, Chieh | en_US |
dc.contributor.author | Hou, Tuo-Hung | en_US |
dc.date.accessioned | 2014-12-08T15:21:00Z | - |
dc.date.available | 2014-12-08T15:21:00Z | - |
dc.date.issued | 2011-12-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2011.2167711 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/14921 | - |
dc.description.abstract | A novel two-bit-per-cell embedded nonvolatile memory (NVM) device requiring no additional mask and process modification in a logic technology has been proposed using a low-temperature poly-Si thin-film transistor with a HfO(2)/Ni gate stack. The feature of two-bit-per-cell is realized by independent localized resistive switching (RS) at the drain and source bits, respectively, and enables increased bit density over the present single-poly NVM for low-cost embedded applications. Furthermore, minimal degradation of the transistor characteristics after RS allows interchangeable logic/memory operations in an identical device. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Embedded nonvolatile memory (NVM) | en_US |
dc.subject | resistive switching (RS) | en_US |
dc.subject | resistive-switching random access memory (RRAM) | en_US |
dc.subject | two-bit-per-cell | en_US |
dc.title | Novel Two-Bit-per-Cell Resistive-Switching Memory for Low-Cost Embedded Applications | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2011.2167711 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 32 | en_US |
dc.citation.issue | 12 | en_US |
dc.citation.spage | 1662 | en_US |
dc.citation.epage | 1664 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000297352500005 | - |
dc.citation.woscount | 3 | - |
顯示於類別: | 期刊論文 |