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dc.contributor.authorChien, CHen_US
dc.contributor.authorChang, CYen_US
dc.contributor.authorLin, HCen_US
dc.contributor.authorChiou, SGen_US
dc.contributor.authorHuang, TYen_US
dc.contributor.authorChang, TFen_US
dc.contributor.authorHsien, SKen_US
dc.date.accessioned2019-04-02T06:00:01Z-
dc.date.available2019-04-02T06:00:01Z-
dc.date.issued1997-05-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/55.568764en_US
dc.identifier.urihttp://hdl.handle.net/11536/149496-
dc.description.abstractDuring ashing process, resist has been intuitively regarded as a protection layer and deliberately removed in previous studies by wet process prior to plasma exposure in an effort to amplify the damage effect, Recently, we found instead that resist does not simply act as a protection layer, This newly observed phenomenon cannot be explained by the well-known electron shading effect which should not affect the area-intensive antenna structure used in our study, In this letter, we hypothesize that this resist-related charging damage is determined by the plasma potential adjustment difference between those devices with and without resist overlayer, The experimental results show a good correlation with our explanation, To be specific, severe antenna area ratio (ARR) dependent degradation of thin gate oxide is induced during the initial ashing stage while the resist is still on the electrodes, not during the overashing period.en_US
dc.language.isoen_USen_US
dc.titleThe role of resist for ultrathin gate oxide degradation during O-2 plasma ashingen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/55.568764en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume18en_US
dc.citation.spage203en_US
dc.citation.epage205en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1997WU99600012en_US
dc.citation.woscount4en_US
Appears in Collections:Articles