電漿製程產生的天線效應對以超薄氧化層製作的深次微米元件可靠度之影響

Abstract

本論文研究的方向，主要著重於探討電漿製程產生的天線效應對以超薄氧 化層製作的深次微米元件可靠度之影響。 由於電漿中充斥高能量的粒子 和帶電的離子電子，所以對半導體元件結構有著潛在性的破壞效應。而日 益複雜的電路接線會扮演天線收集的角色，將此電漿破壞效應無限制的擴 大。因此，電漿可能引起積體電路產品良率降低及可靠度衰退的問題。當 元件的尺寸及氧化層的厚度縮到深次微米的應用範圍時，問題將更具挑戰 性。本論文的重點針對電漿破壞作深入探討，期望瞭解它們機制並提供未 來電漿破壞研究的參考。首先，探討現階段工業界廣範使用來蝕刻金屬層 的電漿機台(MERIE)對以8 nm氧化層製作的元件所引起的天線效應，並示 範各種量測方法評估元件所受到的影響。量測方法包含氧化層崩潰電荷( charge-to-breakdown)、電子捕捉率(initial electron trapping rate) 、相對電導降低率(relative transconductance reduction)及熱電子生 命期(hot-carrier-injection lifetime) 。結果顯示氧化層崩潰電荷是 一種方便但廢時、不敏感的量測方法，只適用於評估較嚴重的天線效應。 電子捕捉率是快速且敏感的量測方法，量測的物件只需要簡單的電容結構 。相對電導降低率可以取代電容量測，因為電容量測受限於元件的極小電 容值。熱電子生命期則是一種廢時且不易估算天線效應的量測方法。其次 ，我們提出一種新的量測技術：萃取閘極電流。它不僅快速且能有效評估 天線效應的量測方法。而一般的臨界電壓可能導致錯誤的結果。此外，我 們比較 MERIE 電漿機台和HWP(helicon wave plasma) 電漿機台電漿破壞 的程度，結果顯示HWP 機台適用於下一代元件製作。再則，我們發現光阻 在光阻灰化電漿天線效應所扮演的角色，並非一般直覺的觀念，認為光阻 只是一層絕緣層，可以保護元件不受帶電子的破壞。因此，在研究光阻灰 化電漿天線效應時，都會事先用濕式蝕刻將光阻去除期望得到最大電漿破 壞。事實上，這是一個錯誤觀念，當氧化層的厚度大於8nm時，光阻並無 明顯的效果。但氧化層的厚度持續變薄時，我們觀察到元件直接曝露在電 漿中不會受到嚴重的特性衰退。相反地，有光阻覆蓋的元件卻受到明顯的 傷害。尤其當氧化層的厚度到達4.2 nm，光阻的效果更加顯著。為了解釋 這個特殊現象，我們提出一定性模型並設計許多實驗去驗證結果均明白說 明光阻確定扮演吃重的角色，模型的可信性因而提升。這個發現對於下一 代灰化電漿機台的設計要求及電漿天線效應的研究有著非常著越的貢獻。 In this thesis, the plasma-induced antenna effect on the reliability degradation of devices with ultrathin gate oxides is extensively investigated. This issue is very important in the modern integrated circuit (IC) manufacturing. Many test vehicles are applied and demonstrated as very powerful tools in the evaluation of plasma-induced antenna effect, including charge- to-breakdown (Qbd), initial-electron-trapping-rate (IETR), relative linear trans-conductance reduction and hot-carrier- injection(HCI). A novel method is demonstrated as a effective tool for the evaluation of plasma-induced damage to thin gate oxides. We have found that gate current measured at Vg ( gate voltage ) = Vth (threshold voltage ) under low drain bias ( e.g., 0.1 Volt ) can serve as a good indicator of plasma damage. Since this method is comparable to a routine device parameter measurement, it thus serves as a simple and efficient damage method for studying the plasma charging induced damage. In addition, a helicon wave plasma(HWP) is found to induce lesser degradation of devices than a magnetically-enhanced- reactive-ion-etcher (MERIE) does. A newly discovered resist- related phenomenon, to our best knowledge, is first presented. It is found that during plasma ashing processes, resist actually participates in the plasma charging damage on ultrathin gate oxides. Distinct from electron shading effect, this resist- related damage effect would induce severe degradation for the devices attached to an area-intensive antenna structure. Our results strongly suggest that resist acts not simply as an insulator which can protects devices from plasma charging. Deliberate resist removal by a wet etching process prior to plasma ashing in previous studies will result in a significant underestimation of plasma damage, especially for the devices with ultrathin oxides (< 6nm). A simple model with a combination of the equivalent capacitor circuit and the self-adjustment behavior between the wafer surface and substrate is proposed and shown to successfully explain this resist-related phenomenon. Data in this issue is very valuable to the development of next generation plasma systems and indeed change the intuitive concept about the resist before.