完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lee, Chen-Ming | en_US |
dc.contributor.author | Tsui, Bing-Yue | en_US |
dc.date.accessioned | 2019-04-02T05:58:10Z | - |
dc.date.available | 2019-04-02T05:58:10Z | - |
dc.date.issued | 2010-07-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2010.2049564 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/150027 | - |
dc.description.abstract | A novel 30-nm gate-all-around (GAA) polycrystalline-silicon (poly-Si) nanowire (NW) thin-film transistor (TFT) is reported for the first time. Owing to the NW and GAA structure, the channel electric potential is well controlled by the gate electrode. After NH3 plasma treatment for defects passivation, the values of 0.97 V, 224 mV/dec., and 0.895 V/V of threshold voltage, subthreshold swing, and drain-induced barrier lowering are achieved, respectively. A high driving current of 459 mu A/mu m and an ON-state/OFF-state current ratio of 5 x 10(7) are also obtained. These excellent characteristics indicate that the ultrasmall GAA NW poly-Si TFT would have the potential to be applied in the 3-D integrated-circuit or system-on-panel field. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Gate-all-around (GAA) | en_US |
dc.subject | poly-Si nanowire | en_US |
dc.subject | thin-film transistor (TFT) | en_US |
dc.title | A High-Performance 30-nm Gate-All-Around Poly-Si Nanowire Thin-Film Transistor With NH3 Plasma Treatment | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2010.2049564 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 31 | en_US |
dc.citation.spage | 683 | en_US |
dc.citation.epage | 685 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000281833100017 | en_US |
dc.citation.woscount | 15 | en_US |
顯示於類別: | 期刊論文 |