完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Wei-Chen | en_US |
dc.contributor.author | Lin, Horng-Chih | en_US |
dc.contributor.author | Lin, Zer-Ming | en_US |
dc.contributor.author | Hsu, Chin-Tsai | en_US |
dc.contributor.author | Huang, Tiao-Yuan | en_US |
dc.date.accessioned | 2019-04-02T05:58:35Z | - |
dc.date.available | 2019-04-02T05:58:35Z | - |
dc.date.issued | 2010-10-29 | en_US |
dc.identifier.issn | 0957-4484 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1088/0957-4484/21/43/435201 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/150057 | - |
dc.description.abstract | Employing mix-and-match lithography of I-line stepper and e-beam direct writing, independent double-gated poly-Si nanowire thin film transistors with channel lengths ranging from 70 nm to 5 mu m were fabricated and characterized. Electrical measurements performed under cryogenic ambient displayed intriguing characteristics in terms of length dependent abrupt switching behavior for one of the single-gated modes. Through simulation and experimental verification, the root cause for this phenomenon was identified to be the non-uniformly distributed dopants introduced by ion implantation. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A study on low temperature transport properties of independent double-gated poly-Si nanowire transistors | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1088/0957-4484/21/43/435201 | en_US |
dc.identifier.journal | NANOTECHNOLOGY | en_US |
dc.citation.volume | 21 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000282511100002 | en_US |
dc.citation.woscount | 2 | en_US |
顯示於類別: | 期刊論文 |