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dc.contributor.authorTsai, C. Y.en_US
dc.contributor.authorWu, T. L.en_US
dc.contributor.authorChin, Alberten_US
dc.date.accessioned2019-04-02T05:57:55Z-
dc.date.available2019-04-02T05:57:55Z-
dc.date.issued2012-01-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2011.2172911en_US
dc.identifier.urihttp://hdl.handle.net/11536/150429-
dc.description.abstractUsing a high-k LaAlO3/SiO2 gate dielectric, the recessed-gate GaN MOSFET has a low threshold voltage (V-t) of 0.1 V, low on-resistance (R-on) of 13.5 Omega . mm, high breakdown voltage of 385 V, high transconductance (g(m)) of 136 mS/mm, and record-best normalized drive current (mu C-ox) of 172 mu A/V-2. Such excellent device integrity is due to the small capacitance equivalent thickness of 3.0 nm, using a high-k gate dielectric and recessed-gate etching.en_US
dc.language.isoen_USen_US
dc.subjectGaNen_US
dc.subjecthigh ken_US
dc.subjectLaAlO3en_US
dc.subjectMOSFETen_US
dc.titleHigh-Performance GaN MOSFET With High-k LaAlO3/SiO2 Gate Dielectricen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2011.2172911en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume33en_US
dc.citation.spage35en_US
dc.citation.epage37en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000298380300011en_US
dc.citation.woscount62en_US
Appears in Collections:Articles