標題: High-Performance GaN MOSFET With High-k LaAlO(3)/SiO(2) Gate Dielectric
作者: Tsai, C. Y.
Wu, T. L.
Chin, Albert
電機工程學系
Department of Electrical and Computer Engineering
公開日期: 1-一月-2012
摘要: Using a high-k LaAlO(3)/SiO(2) gate dielectric, the recessed-gate GaN MOSFET has a low threshold voltage (V(t)) of 0.1 V, low on-resistance (R(on)) of 13.5 Omega . mm, high breakdown voltage of 385 V, high transconductance (g(m)) of 136 mS/mm, and record-best normalized drive current (mu C(ox)) of 172 mu A/V(2). Such excellent device integrity is due to the small capacitance equivalent thickness of 3.0 nm, using a high-k gate dielectric and recessed-gate etching.
URI: http://dx.doi.org/10.1109/LED.2011.2172911
http://hdl.handle.net/11536/15019
ISSN: 0741-3106
DOI: 10.1109/LED.2011.2172911
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 33
Issue: 1
起始頁: 35
結束頁: 37
顯示於類別:期刊論文