完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Yan, Jin-Tai | en_US |
dc.contributor.author | Yen, Chia-Heng | en_US |
dc.date.accessioned | 2019-04-02T06:04:49Z | - |
dc.date.available | 2019-04-02T06:04:49Z | - |
dc.date.issued | 2018-01-01 | en_US |
dc.identifier.issn | 2472-467X | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/151047 | - |
dc.description.abstract | For the signal connections between two adjacent dies in 3D ICs, the redistributed layers (RDLs) routing from 10 pads to micro-humps plays an important role. In this paper, given a set of nets on the upper and lower RDLs between two adjacent dies, based on the separation of one 2-pin net on the upper and lower RDLs using one micro-hump, an efficient two-phase algorithm can he proposed to assign feasible micro bumps onto the nets to minimize the overlapping degree and the X-type intersections on the routing regions for single-layer RDI, routing. Compared with Kuan's algorithm and Yan's algorithm in the micro-hump assignment for single-layer RBI, routing, the experimental results show that our proposed algorithm can use less CPU time to assign feasible micro humps onto the given nets and obtain 100% routability with shorter wirelength in 5 tested examples. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Feasible Assignment of Micro-Bumps in 3D ICs | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2018 16TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS) | en_US |
dc.citation.spage | 296 | en_US |
dc.citation.epage | 299 | en_US |
dc.contributor.department | 生物資訊及系統生物研究所 | zh_TW |
dc.contributor.department | Institude of Bioinformatics and Systems Biology | en_US |
dc.identifier.wosnumber | WOS:000458806300069 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |