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dc.contributor.authorYan, Jin-Taien_US
dc.contributor.authorYen, Chia-Hengen_US
dc.date.accessioned2019-04-02T06:04:49Z-
dc.date.available2019-04-02T06:04:49Z-
dc.date.issued2018-01-01en_US
dc.identifier.issn2472-467Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/151047-
dc.description.abstractFor the signal connections between two adjacent dies in 3D ICs, the redistributed layers (RDLs) routing from 10 pads to micro-humps plays an important role. In this paper, given a set of nets on the upper and lower RDLs between two adjacent dies, based on the separation of one 2-pin net on the upper and lower RDLs using one micro-hump, an efficient two-phase algorithm can he proposed to assign feasible micro bumps onto the nets to minimize the overlapping degree and the X-type intersections on the routing regions for single-layer RDI, routing. Compared with Kuan's algorithm and Yan's algorithm in the micro-hump assignment for single-layer RBI, routing, the experimental results show that our proposed algorithm can use less CPU time to assign feasible micro humps onto the given nets and obtain 100% routability with shorter wirelength in 5 tested examples.en_US
dc.language.isoen_USen_US
dc.titleFeasible Assignment of Micro-Bumps in 3D ICsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2018 16TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS)en_US
dc.citation.spage296en_US
dc.citation.epage299en_US
dc.contributor.department生物資訊及系統生物研究所zh_TW
dc.contributor.departmentInstitude of Bioinformatics and Systems Biologyen_US
dc.identifier.wosnumberWOS:000458806300069en_US
dc.citation.woscount0en_US
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