| 標題: | A NOVEL VLSI ARRAY DESIGN FOR THE DISCRETE HARTLEY TRANSFORM USING CYCLIC CONVOLUTION |
| 作者: | GUO, JI LIU, CM JEN, CW 交大名義發表 National Chiao Tung University |
| 公開日期: | 1-Jan-1994 |
| URI: | http://hdl.handle.net/11536/151136 |
| 期刊: | ICASSP-94 PROCEEDINGS, VOL 2: S2AUVN - SPEECH PROCESSING 2, AUDIO, UNDERWATER ACOUSTICS, VLSI & NEURAL NETWORKS |
| 起始頁: | 501 |
| 結束頁: | 504 |
| Appears in Collections: | Conferences Paper |
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- A memory-efficient realization of cyclic convolution and its application to discrete cosine transform / Chen, HC;Guo, JI;Chang, TS;Jen, CW
- The long length DHT design with a new hardware efficient distributed arithmetic approach and cyclic preserving partitioning / Chen, HC;Chang, TS;Guo, JI;Jen, CW
- Hardware-efficient DFT designs with cyclic convolution and subexpression sharing / Chang, TS;Guo, JI;Jen, CW
- 新式位元層次設計方法及其應用於離散弦轉換 / 陳漢臣;任建葳;張添烜;Chein-Wei Jen;Tian-Sheuan Chang
- 利用分散算術及質因數演算法設計之離散哈特萊轉換系統超大型積體電路實現 / 沈文仁
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