Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Wei-Lien Sung | en_US |
dc.contributor.author | Han-Lung Liu | en_US |
dc.contributor.author | Wen-Chuan Wang | en_US |
dc.contributor.author | Chi-Liang Kuo | en_US |
dc.contributor.author | Yuan-Hao Chang | en_US |
dc.contributor.author | Wen-Che Wang | en_US |
dc.contributor.author | Po-Tsun Liu | en_US |
dc.contributor.author | Guang-Ting Zheng | en_US |
dc.contributor.author | Yu-Fan Tu | en_US |
dc.date.accessioned | 2019-04-11T06:05:24Z | - |
dc.date.available | 2019-04-11T06:05:24Z | - |
dc.date.issued | 2018-03-01 | en_US |
dc.identifier.govdoc | G09G003/36 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/151418 | - |
dc.description.abstract | A gate driving circuit is provided. The gate driving circuit includes multistage driving modules, where an Nth stage driving module includes a setting circuit, a first driving circuit, an isolating switch circuit, a second driving circuit and an anti-noise circuit. The setting circuit generates a first precharge signal according to a gate driving signal of an (N−2)th scan line or a start signal. The isolating switch circuit coupled between the first driving circuit and the second driving circuit provides a second precharge signal, so as to effectively avoid a flickering problem of a display image caused by a surge of the gate driving signal due to a coupling effect of a parasitic capacitance of the transistor and a bootstrap capacitor, and meanwhile the bootstrap capacitor is not used, so as to effectively reduce a bezel area. | en_US |
dc.language.iso | en_US | en_US |
dc.title | GATE DRIVING CIRCUIT | en_US |
dc.type | Patents | en_US |
dc.citation.patentcountry | USA | en_US |
dc.citation.patentnumber | 20180061350 | en_US |
Appears in Collections: | Patents |
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