完整後設資料紀錄
DC 欄位 | 值 | 語言 |
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dc.contributor.author | Chen, Bo-Yuan | en_US |
dc.contributor.author | Chen, Kun-Ming | en_US |
dc.contributor.author | Shiao, Yu-Shao Jerry | en_US |
dc.contributor.author | Lin, Chuang-Ju | en_US |
dc.contributor.author | Huang, Guo-Wei | en_US |
dc.contributor.author | Chen, Hsiu-Chih | en_US |
dc.contributor.author | Hsueh, Fu-Kuo | en_US |
dc.contributor.author | Shen, Chang-Hong | en_US |
dc.contributor.author | Shieh, Jia-Min | en_US |
dc.contributor.author | Chang, Edward Yi | en_US |
dc.date.accessioned | 2019-05-02T00:25:49Z | - |
dc.date.available | 2019-05-02T00:25:49Z | - |
dc.date.issued | 2019-04-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://dx.doi.org/10.7567/1347-4065/ab02e1 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/151578 | - |
dc.description.abstract | In this paper, we present the dc and high-frequency characteristics of trigate polycrystalline-silicon (poly-Si) thin-film transistors (TFTs) for RF applications. Trigate TFTs were fabricated using a 3D-IC process and designed with a multi-finger gate and multi-channel configuration. To obtain an optimal device design guideline, different source/drain (S/D) extension dimensions and channel layouts are investigated. We find that devices with a shorter or wider extension have higher cutoff frequencies (f(T)) and maximum oscillation frequencies (f(max)) owing to their lower S/D resistances. In addition, the high-frequency performance can be further improved by adopting the tapered channel structure, where the channel width increases gradually from the source to the drain. For the optimal device designs, the values of f(T) and f(max) are around 25 GHz and 30 GHz, respectively. The high f(T) and f(m)(ax) as well as excellent gate controllability in our devices indicate the trigate poly-Si TFT could be a suitable candidate for low-cost RFIC applications. (C) 2019 The Japan Society of Applied Physics | en_US |
dc.language.iso | en_US | en_US |
dc.title | DC and high-frequency characteristics of trigate polycrystalline-silicon thin-film transistors with different layout geometries | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.7567/1347-4065/ab02e1 | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS | en_US |
dc.citation.volume | 58 | en_US |
dc.citation.issue | SB | en_US |
dc.citation.spage | 0 | en_US |
dc.citation.epage | 0 | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000464309900119 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |