標題: A Comprehensive Study of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Layer Effects on Negative Capacitance FETs for Sub-5 nm Node
作者: Tang, Y. -T
Su, C. -J.
Wang, Y. -S.
Kao, K. -H.
Wu, T. -L.
Sung, P. -J.
Hou, F. -J.
Wang, C. -J.
Yeh, M. -S.
Lee, Y. -J.
Wu, W. -F.
Huang, G. -W.
Shieh, J. -M.
Yeh, W. -K.
Wang, Y. -H.
交大名義發表
National Chiao Tung University
公開日期: 1-一月-2018
摘要: The impact of a realistic representation of gate-oxide granularity on negative-capacitance (NC) FETs at sub-5nm node is studied by a newly developed thermodynamic energy model based on the first principle calculation (FPC). For the first time, the calculation fully couples the Landau-Khalatnikov (L-K) equation with grain-size effect equation in NC-FETs. It explains the experimental results in phase transition and reveals excellent immunity against depolarization in ferroelectric (FE) layer owing to dopant concentration and stress in thin films. A sub-5nm node (L-G=10nm) NC-FET with thin FE layer (T-FE similar to 2nm) is integrated to achieve low subthreshold slope (SS) of 52mV/dec via a 1.9GPa-tensor stressed interfacial layer (IL) and 12% Zr-doped HfO2.
URI: http://hdl.handle.net/11536/152027
ISBN: 978-1-5386-4218-4
期刊: 2018 IEEE SYMPOSIUM ON VLSI TECHNOLOGY
起始頁: 45
結束頁: 46
顯示於類別:會議論文