標題: Abnormal C-V Hump Effect Induced by Hot Carriers in Gate Length-Dependent p-Type LTPS TFTs
作者: Huang, Shin-Ping
Chen, Po-Hsun
Tsao, Yu-Ching
Chen, Hong-Chih
Zheng, Yu-Zhe
Chu, Ann-Kuo
Shih, Yu-Shan
Wang, Yu-Xuan
Wu, Chia-Chuan
Shih, Yao-Kai
Chung, Yu-Hua
Chen, Wei-Han
Wang, Terry Tai-Jui
Zhang, Sheng-Dong
Chang, Ting-Chang
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Stress;Logic gates;Hot carriers;Thin film transistors;Degradation;Length measurement;Current measurement;Gate length-dependent;hot carrier effect;hump effect;low-temperature polysilicon (LTPS) thin-film transistors (TFTs)
公開日期: 1-Nov-2019
摘要: We investigate the abnormal current-voltage (C-V) hump effect of p-type low-temperature polysilicon (LTPS) thin-film transistors (TFTs) which have undergone high current operations. Experimental results indicate localized electron trapping in the gate insulator (GI), which is carried out near the drain. The ON-current ( ${I}_{ \mathrm{\scriptscriptstyle ON}}$ ) enhancement is due to the reduction of effective length, and the OFF-current ( ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ ) decrease as the electron tunneling path distance increases. These can be observed after hot carrier stress in current characteristics. The C-V measurements demonstrate that the threshold voltage ( ${V}_{\text {th}}$ ) shift is associated with the gate length. In addition, capacitance-voltage measurements also show that this localized trapping region remains the same in length, regardless of channel length. Hence, a model is proposed to explain how the electric field, which is gate length-dependent, affects the source side of the device, and then lowers the source barrier height. This leads to bulk leakage, which causes the subthreshold swing degradation at device scale down.
URI: http://dx.doi.org/10.1109/TED.2019.2942149
http://hdl.handle.net/11536/153229
ISSN: 0018-9383
DOI: 10.1109/TED.2019.2942149
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 66
Issue: 11
起始頁: 4764
結束頁: 4767
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