完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Tsai, C. Y. | en_US |
dc.contributor.author | Chin, Albert | en_US |
dc.date.accessioned | 2014-12-08T15:21:34Z | - |
dc.date.available | 2014-12-08T15:21:34Z | - |
dc.date.issued | 2012-01-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TED.2011.2171970 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/15329 | - |
dc.description.abstract | We made the MoN-[SiO(2)-LaAlO(3)]-[Ge-HfON]-[LaAlO(3)-SiO(2)]-Si charge-trapping (CT) Flash device with a record-thinnest 2.5-nm equivalent-Si(3)N(4)-thickness trapping layer, a large 4.4-V initial memory window, a 3.2-V ten-year extrapolated retention window at 125 degrees C, and a 3.6-V endurance window at 106 cycles, under very fast 100 mu s and low +/- 16-V program/erase pulses. These were achieved using Ge reaction with a HfON trapping layer for better CT and retention. | en_US |
dc.language.iso | en_US | en_US |
dc.title | High-Performance Charge-Trapping Flash Memory Device With an Ultrathin 2.5-nm Equivalent-Si(3)N(4)-Thickness Trapping Layer | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TED.2011.2171970 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 59 | en_US |
dc.citation.issue | 1 | en_US |
dc.citation.spage | 252 | en_US |
dc.citation.epage | 254 | en_US |
dc.contributor.department | 電機工程學系 | zh_TW |
dc.contributor.department | Department of Electrical and Computer Engineering | en_US |
顯示於類別: | 期刊論文 |