標題: | Structual Design of T-gate, Air-spacer Poly-Si TFTs for RF applications |
作者: | Huang, Yu-An Yeh, Yu-Hsiang Lin, Horng-Chih Li, Pei-Wen 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-一月-2019 |
摘要: | We employed Sentaurus TCAD simulation to explore the impacts of major structural parameters on the electrical characteristics of poly-Si TFTs with T-gate and air spacers. The effects and trade-off between the source/drain (S/D) junctions relative to T-gate are discussed with the aim to find insightful information for the design and fabrication of real devices. Influences of the gate geometry on the parasitic capacitances of the T-gate devices are also simulated. |
URI: | http://hdl.handle.net/11536/153342 |
ISSN: | 2161-4636 |
期刊: | 2019 SILICON NANOELECTRONICS WORKSHOP (SNW) |
起始頁: | 35 |
結束頁: | 36 |
顯示於類別: | 會議論文 |