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dc.contributor.authorLi, Zu-Chengen_US
dc.contributor.authorGuo, Jyh-Chyurnen_US
dc.contributor.authorLin, Jinq-Minen_US
dc.date.accessioned2020-02-02T23:55:33Z-
dc.date.available2020-02-02T23:55:33Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-1-7281-0942-8en_US
dc.identifier.issn1930-8868en_US
dc.identifier.urihttp://hdl.handle.net/11536/153664-
dc.description.abstractMulti-finger (MF) and multi-ring (MR) nMOSFETs were designed and fabricated in 40nm CMOS technology to explore the layout dependent effects in key device parameters and parasitic RC responsible for RF performance. For the first time, the experimental proves the advantages of MR nMOSFETs, such as the increase of effective mobility (mu(eff)), transconductance (g(m)), and channel current (I-DS), and smaller parasitic source resistance (R-S), all of which are in favor of higher speed and higher frequency. However, the undesired increase of 3-D fringing capacitances may bring a critical trade-off influencing high frequency performance. In this paper, new observation and in-depth analysis of the complicated layout dependent effects can facilitate the device layout optimization in the right direction for RF and mm-wave design and applications.en_US
dc.language.isoen_USen_US
dc.titleNew Observation and Analysis of Layout Dependent Effects in Sub-40nm Multi-Ring and Multi-Finger nMOSFETs for High Frequency Applicationsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000503374900004en_US
dc.citation.woscount0en_US
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