Fabrication of Omega-gated Negative Capacitance FinFETs and SRAM

標題:	Fabrication of Omega-gated Negative Capacitance FinFETs and SRAM
作者:	Sung, P-J Su, C-J Lu, D. D. Luo, S-X Kao, K-H Ciou, J-Y Jao, C-Y Hsu, H-S Wang, C-J Hong, T-C Liao, T-H Fang, C-C Wang, Y-S Huang, H-F Li, J-H Huang, Y-C Hsueh, F-K Wu, C-T Ma, W. C-Y Huang, K-P Lee, Y-J Chao, T-S Li, J-Y Wu, W-F Yeh, W-K Wang, Y-H 電子物理學系 Department of Electrophysics
公開日期:	1-一月-2019
摘要:	Omega-gated negative capacitance (NC) FinFETs, CMOS inverters and SRAM are fabricated and analyzed. Forming gas annealing (FGA) is performed and found to not only enhance ferroelectricity (FE) but also the NCFET electrostatics, in terms of higher I-ON, smaller hysteresis and subthreshold slop (SS). The SS is less than 60 mV/dec for both N-FinFET and P-FinFET in this work. Moreover, the CMOS inverter shows more symmetric and larger voltage gain after FGA.
URI:	http://hdl.handle.net/11536/153667
ISBN:	978-1-7281-0942-8
ISSN:	1930-8868
期刊:	2019 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)
起始頁:	0
結束頁:	0
顯示於類別：	會議論文