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dc.contributor.authorHsieh, E. R.en_US
dc.contributor.authorChang, C. W.en_US
dc.contributor.authorChuang, C. C.en_US
dc.contributor.authorChen, H. W.en_US
dc.contributor.authorChung, Steve S.en_US
dc.date.accessioned2020-07-01T05:20:35Z-
dc.date.available2020-07-01T05:20:35Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-4-86348-718-5en_US
dc.identifier.urihttp://hdl.handle.net/11536/154286-
dc.description.abstractA 4kb macro of One Time Programming (OTP) memory, implemented by a new breakdown, named dielectric fuse (dFuse) breakdown, has been realized on a foundry pure logic 28nm HKMG CMOS platform. The feature size of a unit cell is 1.5T per cell with 7.5F2. The experimental results show that dFuse macro exhibits high programming (PGM) speed of 100ns at 4V, read time smaller than lOns at 0.75V, and excellent data retention under one -month baking at 150 C. More importantly, the program voltage is weakly dependent on the environmental temperature, suitable for automotive applications. This OTP is also expected to be scalable to advanced node such as FinFET and provides an ideal and reliable solution for the storage purpose in loT and 5G era.en_US
dc.language.isoen_USen_US
dc.titleThe Demonstration of Gate Dielectric -fuse 4kb OTP Memory Feasible for Embedded Applications in High -k Metal-gate CMOS Generations and Beyonden_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 SYMPOSIUM ON VLSI CIRCUITSen_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000531736500072en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper