標題: | Trapping Depth and Transition Probability of Four-Level Random Telegraph Noise in a Gate-All-Around Poly-Si Nanowire Transistor |
作者: | Change, You-Tai Tsai, Yueh-Lin Peng, Kang-Ping Su, Chun-Jung Li, Pei-Wen Lin, Horng-Chih 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Logic gates;Electron traps;Gallium arsenide;Transistors;Current measurement;Voltage measurement;Fluctuations;Random telegraph noise (RTN);multi-level RTN;poly-Si nanowire transistors;gate-all-around (GAA);transition probability;relative trapping;de-trapping frequency |
公開日期: | 1-一月-2020 |
摘要: | In this article, we investigate the four-level random telegraph noise (RTN) characteristics of a gate-all-around (GAA) nanowire (NW) transistor. The RTN-testing devices were fabricated with the sidewall spacer etching technique. The effective channel length and width are approximately 150 and 30 nm, respectively. By decoupling the four-level RTN, we are able to extract the time constants associated with the two traps. Circle-shaped approximations are used to mimic the triangular NW for evaluating the depths of the traps. The extracted depths of the two traps are very close to each other, which is consistent with the time-evolution measured results. We've also explored the probabilities of transitions between two specific current levels in the RTN characteristics, as well as the relative trapping/de-trapping frequencies. |
URI: | http://dx.doi.org/10.1109/TNANO.2020.2987824 http://hdl.handle.net/11536/154598 |
ISSN: | 1536-125X |
DOI: | 10.1109/TNANO.2020.2987824 |
期刊: | IEEE TRANSACTIONS ON NANOTECHNOLOGY |
Volume: | 19 |
起始頁: | 338 |
結束頁: | 343 |
顯示於類別: | 期刊論文 |