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dc.contributor.authorWu, CCen_US
dc.contributor.authorChen, Cen_US
dc.date.accessioned2014-12-08T15:02:57Z-
dc.date.available2014-12-08T15:02:57Z-
dc.date.issued1996-01-01en_US
dc.identifier.issn1350-2387en_US
dc.identifier.urihttp://hdl.handle.net/11536/1554-
dc.description.abstractParallel multithreaded architectures take advantage of the ability to execute more than one thread simultaneously on a single chip at low synchronisation and communication costs and high hardware resource utilisation. However, a high bandwidth cache, such as a multibank cache, is especially critical to serve memory accesses issued at the same time from different threads. To prevent bank conflicts of multibank cache from seriously degrading system performance, a loop partition method is proposed to reduce or even eliminate bank conflicts. The partition allows each thread access to certain bank modules and prevents any two from accessing the same bank module. The method neither slows down the clock rate nor increases the array subscript expression complexity. The performance gains of the bank-conflict-free loop partition approach are shown in simulation results.en_US
dc.language.isoen_USen_US
dc.subjectloop partitionen_US
dc.subjectmultibank cacheen_US
dc.subjectbank conflicten_US
dc.subjectmultithreaded processoren_US
dc.subjectcompile timeen_US
dc.titleA loop partition technique for reducing cache bank conflict in multithreaded architectureen_US
dc.typeArticleen_US
dc.identifier.journalIEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUESen_US
dc.citation.volume143en_US
dc.citation.issue1en_US
dc.citation.spage30en_US
dc.citation.epage36en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:A1996TW48900005-
dc.citation.woscount0-
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