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dc.contributor.authorHsieh, Wei-Chihen_US
dc.contributor.authorHwang, Weien_US
dc.date.accessioned2014-12-08T15:23:12Z-
dc.date.available2014-12-08T15:23:12Z-
dc.date.issued2012-06-01en_US
dc.identifier.issn1063-8210en_US
dc.identifier.urihttp://hdl.handle.net/11536/16286-
dc.description.abstractIn this paper, an all digital push-pull linear voltage regulator is proposed that consists of a digital error detector, a voltage divider, a mode indicator, a pull device, and grouped push devices. The digital regulator is suitable for super-to near-threshold region operation by providing a variable output voltage that ranges from 0.5 to 1 V in steps of 0.1 V. The maximum load current is 100 mA for every output level. The current efficiency is 99.8% with only 164.5 mu A quiescent current on UMC 65-nm standard CMOS technology. A response time constraint is developed to provide a design guideline for (all) the digital control system. It describes the correlation between required speed of the digital control system, the output performance and the size of the decoupling capacitor. A time interleaving control technique is then proposed to have a tradeoff between output performance, quiescent current, and the size of decoupling capacitor.en_US
dc.language.isoen_USen_US
dc.subjectCurrent efficiencyen_US
dc.subjectdigitalen_US
dc.subjectlinear regulatoren_US
dc.subjectpush-pullen_US
dc.subjectresponse time constrainten_US
dc.subjecttime interleavingen_US
dc.titleAll Digital Linear Voltage Regulator for Super- to Near-Threshold Operationen_US
dc.typeArticleen_US
dc.identifier.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMSen_US
dc.citation.volume20en_US
dc.citation.issue6en_US
dc.citation.epage989en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000304102000002-
dc.citation.woscount4-
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