標題: | A cost effective output response analyzer for Sigma-Delta modulation based BIST systems |
作者: | Hong, Hao-Chiao Liang, Sheng-Chuan 電控工程研究所 Institute of Electrical and Control Engineering |
公開日期: | 2006 |
摘要: | A cost effective output response analyzer (ORA) for Sigma-Delta modulation based BIST systems is presented. Instead of using Fast Fourier Transform (FFT) to derive the signal-to-noise-and-distortion ratio (SNDR) infrequency domain, the proposed ORA using the modified controlled sine wave fitting procedure to calculate the signal power and the total-harmonic-distortion-and-noise power in time domain separately. It requires neither parallel multiplier nor complex CPU/DSP and bulky memory thus has a low cost. A second-order design-for-digital-testability Sigma-Delta modulator is used as the circuit under test example. Simulation results show that the SNDR differences between conventional FFT analysis and the proposed ORA have a mean and standard deviation of 0.64 dB and 0.36 dB respectively. The cost effectiveness and satisfying accuracy features make it suitable for embedded BIST applications. |
URI: | http://hdl.handle.net/11536/17150 |
ISBN: | 978-0-7695-2628-7 |
ISSN: | 1081-7735 |
期刊: | PROCEEDINGS OF THE 15TH ASIAN TEST SYMPOSIUM |
起始頁: | 255 |
結束頁: | 261 |
顯示於類別: | 會議論文 |