標題: Low-power wordline voltage generator for low-voltage flash memory
作者: Wang, Tzu-Ming
Ker, Ming-Dou
Yeh, Steve
Chang, Ya-Chun
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2006
摘要: Wordline voltage generating circuit with high speed active mode and low power standby mode is proposed. In the active mode, two different ring oscillators with high clock frequency (f(CLK)) 170MHz, and low clock frequency (f(CLK)) 25MHz which is also the operating frequency of the entire circuit, are employed. The proposed circuit has a short response time of 3 mu s typically in active mode, and very low standby current about 3 mu A in standby mode.
URI: http://hdl.handle.net/11536/17182
http://dx.doi.org/10.1109/ICECS.2006.379765
ISBN: 978-1-4244-0394-3
DOI: 10.1109/ICECS.2006.379765
期刊: 2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3
起始頁: 220
結束頁: 223
顯示於類別:會議論文


文件中的檔案:

  1. 000252489600055.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。