標題: The Design of Low-Power CIFF Structure Second-Order Sigma-Delta Modulator
作者: Su, Pin-Han
Chiueh, Herming
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2009
摘要: This paper presents the design and implementation of a low power sigma-delta modulator (SDM) with a standard 0.18-mu m CMOS technology. A current optimization technique is utilized in proposed design to reduce the power of operational trans-conductance amplifier(OTA). Using a chain of Integrators with weighted feed-forward summation (CIFF) structure and optimized single-stage class-A OTA with positive feedback to minimize the power consumption, the second-order SDM achieves a SNR of 64dB that be able to process the signal form DC to 16 KHz. The power consumption is only 18.1 uW from a 1-V supply.
URI: http://hdl.handle.net/11536/17306
http://dx.doi.org/10.1109/MWSCAS.2009.5236077
ISBN: 978-1-4244-4479-3
ISSN: 1548-3746
DOI: 10.1109/MWSCAS.2009.5236077
期刊: 2009 52ND IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2
起始頁: 377
結束頁: 380
Appears in Collections:Conferences Paper


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