標題: Memory-hierarchy-based power reduction for H.264/AVC video decoder
作者: Liu, Tsu-Ming
Lee, Chen-Yi
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2006
摘要: Memory storage is crucial power factor in H.264/AVC video decoding system. In this paper, we exploit three-level of memory hierarchy to break the data dependency and reduce the number of access for external memory. further, we apply line-pixel-lookahead (LPL) scheme to make a compromise between power consumption and internal memory cost. Experimental results prove that about 50% of memory power reduction can be achieved as compared to comparable decoders without exploiting memory hierarchy [1][2].
URI: http://hdl.handle.net/11536/17320
ISBN: 1-4244-0179-8
期刊: 2006 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION, AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PAPERS
起始頁: 247
結束頁: 250
顯示於類別:會議論文