Title: | ESD (Electrostatic Discharge) protection design for nanoelectronics in CMOS technology |
Authors: | Ker, Ming-Dou 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
Issue Date: | 2006 |
Abstract: | In this tutorial, we teach useful on-chip ESD protection designs for CMOS integrated circuits. The contents include (1) Introduction to Electrostatic Discharge, (2) Design Techniques of ESD Protection Circuit, (3) Whole-Chip ESD Protection Design, and (4) ESD Protection for Mixed-Voltage I/O Interface. The clear ESD protection design concepts and detailed circuit implementations are presented in this course. ESD protection design is more important in the nanoscale CMOS technology. High ESD robustness can not be achieved with only process solutions. The circuit design solutions should be added into the chips with suitable layout arrangement to achieve the purpose of whole-chip ESD protection for IC products. |
URI: | http://hdl.handle.net/11536/17334 |
ISBN: | 1-4244-0460-6 |
Journal: | Advanced Signal Processing, Circuits, and System Design Techniques for Communications |
Begin Page: | 217 |
End Page: | 279 |
Appears in Collections: | Conferences Paper |