標題: | An implementation of integrable low power techniques for modem cell-based VLSI designs |
作者: | Lee, Ming-Chung Chiueh, Herming 電信工程研究所 Institute of Communications Engineering |
公開日期: | 2006 |
摘要: | Recent research has proposed several low-power design techniques for VLSI circuitry in nano-scale CMOS era. However, these techniques always involve custom layout design or novel EDA flows. In this paper essential low power techniques such as voltage separation, body bias and power switch are implemented in existent place and route (P&R) tools. These techniques enable the possibility to integrated low power techniques into standard Cell-Based physical design flow. The result of these research shows a little overhead in design procedure equally area overhead compare with fully custom design flow. The proposed low power design techniques can be cooperated with modern power management system to enable the power reduction in targeting circuitry with small implementation overheads. |
URI: | http://hdl.handle.net/11536/17423 http://dx.doi.org/10.1109/ICECS.2006.379932 |
ISBN: | 978-1-4244-0394-3 |
DOI: | 10.1109/ICECS.2006.379932 |
期刊: | 2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3 |
起始頁: | 890 |
結束頁: | 893 |
顯示於類別: | 會議論文 |