標題: ESD protection design for mixed-voltage I/O interfaces - Overview
作者: Ker, Ming-Dou
Lin, Kun-Hsien
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2005
摘要: Electrostatic discharge (ESD) protection design for mixed-voltage I/O interfaces has been one of the key challenges of system-on-a-chip (SOC) implementation in nanoscale CMOS processes. This paper presents an overview on the design concept and circuit implementations of the ESD protection designs for mixed-voltage I/O interfaces without using the additional thick gate-oxide process. The ESD design constraints in mixed-voltage I/O interfaces, the classification, and analysis of ESD protection designs for mixed-voltage I/O interfaces are presented and discussed.
URI: http://hdl.handle.net/11536/17723
ISBN: 978-0-7803-9339-4
期刊: 2005 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, PROCEEDINGS
起始頁: 493
結束頁: 498
顯示於類別:會議論文