標題: | A cost-effective memory-based real-valued FFT and hermitian symmetric IFFT processor for DMT-based wire-line transmission systems |
作者: | Chi, HF Lai, ZH 電信工程研究所 Institute of Communications Engineering |
公開日期: | 2005 |
摘要: | This paper presents an efficient computation scheme for the memory-based FFT/IFFT processor used in DMT (discrete multi-tone) systems. Only half-size FFT/IFFT is required to transform real-valued data and Hermitain symmetric data. That is, the cost in processing elements and memory can be reduced by two. Finally, a variable-size radix-4 memory-based FFT/IFFT processor with block scaling scheme is designed for DMT systems. |
URI: | http://hdl.handle.net/11536/17800 |
ISBN: | 0-7803-8834-8 |
ISSN: | 0271-4302 |
期刊: | 2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS |
起始頁: | 6006 |
結束頁: | 6009 |
顯示於類別: | 會議論文 |